STIMESI : Stimulation action on MEMS and SiP  

Third STIMESI Workshop on MEMS and Microsystems Research and Teaching

Kaiserstejnsky Palace, Prague, Czech Republic

13 November 2009

 
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Third STIMESI Workshop on MEMS and Microsystems Research and Teaching

Kaiserstejnsky Palace, Prague, Czech Republic
13 November 2009

You are invited to this one day workshop which will bring together researchers and practitioners in MEMS, microsystems, and similar technologies, in order to present research, share teaching experiences, and encourage the formation of new academic collaborations.

 

The format of the workshop consists of a series of short lectures by invited speakers and presentations, delivered by researchers and students selected from submitted abstracts.

Topics addressed by the workshop comprise: microfluidic systems, RF MEMS, capacitive and piezoresistive sensors, and best-practice in microsystems teaching.

The Workshop is free of charge, you are responsible for making your own travel and accommodation arrangements.
Take a look at the workshop program which is now available here and find your way to the registration page. (Registration is free of charge).

Prior to the Workshop in Prague, STIMESI will run a three day training course on the Tronics Process technology, at the Czech Technical University in Prague (10-12 November). If you wish to attend both the Workshop and the training course, please book your place on both events separately.

For an impression of previous workshop, visit the First STIMESI Workshop page or the Second STIMESI Workshop page

This workshop is organised as part of the STIMESI activity. The objective of this project, funded under the European Commission's Sixth Framework Programme, is to stimulate microsystems teaching and research within European universities and research institutes through the provision of training courses and an annual workshop.

Since the start of STIMESI in 2006, 380 participants from 110 Institutes in Europe have received training in MEMS, Microsystems, or RF System-in-Package design using the multi-project wafer services of Europe's leading foundries.

   
 
        
Sixth Framework Programme

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